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 INTEGRATED CIRCUITS
DATA SHEET
UBA2070 600 V CCFL ballast driver IC
Product specification Supersedes data of 2001 Sep 27 2002 Oct 24
Philips Semiconductors
Product specification
600 V CCFL ballast driver IC
UBA2070
FEATURES * Current controlled operation * Adaptive non-overlap time control * Integrated high voltage level shift function * Power-down function * Protected against lamp failures or lamp removal * Capacitive mode protection. APPLICATION * The circuit topology enables a broad range of backlight inverters. ORDERING INFORMATION
GENERAL DESCRIPTION The UBA2070 is a high voltage integrated circuit for driving electronically ballasted Cold Cathode Fluorescent Lamps (CCFL) at mains voltages up to 277 V (RMS) (nominal value). The circuit is made in a 650 V Bipolar CMOS DMOS (BCD) power logic process. The UBA2070 provides the drive function for the two discrete MOSFETs. Besides the drive function the UBA2070 also includes the level-shift circuit, the oscillator function, a lamp voltage monitor, a current control function, a timer function and protections.
PACKAGE TYPE NUMBER NAME UBA2070T UBA2070P SO16 DIP16 DESCRIPTION plastic small outline package; 16 leads; body width 3.9 mm plastic dual in-line package; 16 leads (300 mil); long body VERSION SOT109-1 SOT38-1
2002 Oct 24
2
Philips Semiconductors
Product specification
600 V CCFL ballast driver IC
UBA2070
QUICK REFERENCE DATA SYMBOL High voltage supply Vhs Start-up state VDD(high) VDD(low) IDD(start) oscillator start voltage oscillator stop voltage start-up current VDD < VDD(high) IL = 10 A 12.4 8.6 - 13 9.1 170 13.6 9.6 200 V V A high side supply voltage Ihs < 30 A; t < 1 s - - 600 V PARAMETER CONDITION MIN. TYP. MAX. UNIT
Reference voltage (pin VREF) Vref fbridge(max) fbridge(min) Isource Isink reference voltage 2.86 2.95 3.04 V
Voltage controlled oscillator maximum bridge frequency minimum bridge frequency VGH - VSH = 0; VGL = 0 VGH - VSH = 13 V; VGL = 13 V 90 38.9 100 40.5 110 42.1 kHz kHz
Output drivers (pins GH and GL) source current sink current 135 265 180 300 235 415 mA mA
Lamp voltage sensor (pin LVS) VLVS(fail) VLVS(max) Voffset gm VOL VOH fail voltage level maximum voltage level 1.19 1.67 -2 100 - - 1.25 1.76 1.31 1.85 V V
Average current sensor (pin CS) offset voltage transconductance VCS = 0 to 2.5 V f = 1 kHz 0 200 +2 400 - - mV A/mV V V
Ignition timer (pin CT) LOW-level output voltage HIGH-level output voltage 1.4 3.6
2002 Oct 24
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dbook, full pagewidth
2002 Oct 24
SUPPLY n.c. 8 GND 5 IGNITION TIMER
BLOCK DIAGRAM
Philips Semiconductors
600 V CCFL ballast driver IC
VDD 7
VREF 3 V 14
9 reference voltages supply (5 V) VDD(clamp) BOOTSTRAP LEVEL SHIFTER HS DRIVER 10
FVDD
digital analog
GH
11 VDD(low) DRIVER LOGIC reset LS DRIVER 6
SH
GL
STATE LOGIC
LOGIC CT 1
* reset state * ignition state * burn state * hold state * powerdown state
ANT/CMD
12
ACM
4
VOLTAGE CONTROLLED OSCILLATOR REFERENCE CURRENT I V 4 IREF 3 CF
LOGIC LAMP VOLTAGE SENSOR AVERAGE CURRENT SENSOR FREQUENCY CONTROL 15 16 CS + CS -
VLVS(fail)
VLVS(max)
Product specification
UBA2070
13 LVS
2
MGT990
CSW
Fig.1 Block diagram.
Philips Semiconductors
Product specification
600 V CCFL ballast driver IC
UBA2070
PINNING SYMBOL CT CSW CF IREF GND GL VDD n.c. FVDD GH SH ACM LVS VREF CS+ CS- PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 ignition timer output voltage controlled oscillator input voltage controlled oscillator output internal reference current input ground gate of the low side switch output low voltage supply not connected floating supply; supply for the high side switch gate of the high side switch output source of the high side switch capacitive mode input lamp voltage sensor input reference voltage output average current sensor positive input average current sensor negative input DESCRIPTION
handbook, halfpage
CT 1 CSW 2 CF 3 IREF 4 GND 5 GL 6 VDD 7 n.c. 8
MGT985
16 CS - 15 CS + 14 VREF 13 LVS
handbook, halfpage
CT 1 CSW 2 CF 3 IREF 4 GND 5 GL 6 VDD 7 n.c. 8
MGT984
16 CS - 15 CS + 14 VREF 13 LVS
UBA2070T
12 ACM 11 SH 10 GH 9 FVDD
UBA2070P
12 ACM 11 SH 10 GH 9 FVDD
Fig.2 Pin configuration (SO16).
Fig.3 Pin configuration (DIP16).
2002 Oct 24
5
Philips Semiconductors
Product specification
600 V CCFL ballast driver IC
UBA2070
FUNCTIONAL DESCRIPTION Start-up state Initial start-up can be achieved by charging CVDD using an external start-up resistor. The start-up of the circuit is such, that the MOSFETs Tls and Ths shall be non-conductive. The circuit will be reset in the start-up state. If the VDD supply reaches the value of VDD(high) the circuit starts oscillating. A DC reset circuit is incorporated in the high side (hs) driver. Below the lockout voltage at pin FVDD the output voltage (VGH - VSH) is zero. The voltages at pins CF and CT are zero during the start-up state. Oscillation The internal oscillator is a Voltage Controlled Oscillator circuit (VCO) which generates a sawtooth waveform between the high level at pin CF and 0 V (see Fig.4). The frequency of the sawtooth is determined by CCF, RIREF and the voltage at pin CSW. The minimum and maximum frequencies are determined by CCF and RIREF. The minimum to maximum ratio is fixed internally. The sawtooth frequency is twice the half bridge frequency. The IC brings the MOSFETs Ths and Tls alternately into conduction with a duty factor of 50%.The oscillator starts oscillating at fmax. During the first switching cycle the MOSFET Tls is switched on. To charge the bootstrap capacitor the first conduction time after the start-up state is made extra long. In all other cases the duty factor at the start is 50%. Non-overlap time The non-overlap time is realized with an Adaptive Non-Overlap circuit (ANT). By using this circuit, the application determines the duration of the non-overlap time (determined by the slope of the half bridge voltage and detected by the signal across RACM) and makes the non-overlap time optimum for each frequency (see Fig.4). The minimum non-overlap time is internally fixed. The maximum non-overlap time is internally fixed at approximately 25% of the bridge period time. Timing circuit A timing circuit is included (a clock generator) to determine the maximum ignition time. The ignition time is defined as 1 pulse at pin CT; the lamp has to ignite within the duration of this pulse. The timer circuit starts operating when a critical value of the lamp voltage [VLVS(fail)] is exceeded. When the timer is not operating the capacitor at pin CT is discharged by 1 mA to 0 V.
Ignition state After the start at fmax the frequency will decrease due to charging the capacitor at pin CSW with an internally fixed current. During this continuous decrease in frequency, the circuit approaches the resonant frequency of the lamp. This will cause a high voltage across the lamp, which ignites the lamp. The ignition voltage of the lamp is designed to be above the VLVS(fail) level. If the lamp voltage exceeds this voltage level the ignition timer is started (see Fig.5). Burn state If the lamp voltage does not exceed the VLVS(max) level the voltage at pin CSW will continue to increase until the clamp level at pin CSW is reached. As a consequence the frequency will decrease until the minimum frequency is reached. When the frequency reaches its minimum level it is assumed that the lamp has ignited, the circuit will enter the burn state and the Average Current Sensor (ACS) circuit will be enabled (see Fig.5). As soon as the average voltage across Rsense (measured at pin CS-) reaches the reference level at pin CS+, the average current sensor circuit will take over the control of the lamp current. The average current through Rsense is transferred to a voltage at the voltage controlled oscillator to regulate the frequency and, as a result, the lamp current. Lamp failure DURING IGNITION STATE If the lamp fails to ignite, the voltage level increases. When the lamp voltage exceeds the VLVS(max) level, the voltage will be regulated at that level. The ignition timer is started when the VLVS(fail) level is exceeded. If the voltage at pin LVS is above the VLVS(fail) level at the end of the ignition time the circuit stops oscillation and is forced into a Power-down state (see Fig.6). This state is terminated by switching off the VDD supply. DURING BURN STATE If the lamp fails during normal operation, the voltage across the lamp will increase and the lamp voltage will exceed the VLVS(fail) level. This forces the circuit to re-enter the ignition state and results in an attempt to re-ignite the lamp. If during restart the lamp still fails, the voltage remains high until the end of the ignition time. At the end of the ignition time the circuit stops oscillating and enters the Power-down state (see Fig.7).
2002 Oct 24
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Philips Semiconductors
Product specification
600 V CCFL ballast driver IC
UBA2070
handbook, full pagewidth
MGT989
CF 0
GH-SH 0
GL 0
Vhalf bridge 0 VACM 0 VCMD -
VCMD +
t
Fig.4 Oscillator and driver timing.
handbook, full pagewidth
VLVS Ignition state VLVS(max) f min detection VLVS(fail) Burn state
Timer on off
start timer
stop timer
t
MGT986
Fig.5 Normal ignition behaviour.
2002 Oct 24
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Philips Semiconductors
Product specification
600 V CCFL ballast driver IC
UBA2070
handbook, full pagewidth
VLVS Ignition state VLVS(max) VLVS(fail) Power-down
Timer on off
start timer
t
MGT987
Fig.6 Lamp failure during ignition state.
handbook, full pagewidth
VLVS Burn state VLVS(max) VLVS(fail)
Ignition
Power-down
Timer on off
start timer
t
MGT988
Fig.7 Lamp failure during burn state.
2002 Oct 24
8
Philips Semiconductors
Product specification
600 V CCFL ballast driver IC
UBA2070
Power-down state The Power-down state will be entered if, at the end of the ignition time, the voltage at pin LVS is above VLVS(fail). In the Power-down state the oscillation will be stopped and MOSFETs Ths and Tls will be non-conductive. The VDD supply is internally clamped. The circuit is released from the Power-down state by reducing the supply voltage to below VDD(reset). Capacitive mode protection The signal across RACM also gives information about the switching behaviour of the half bridge. If the voltage at RACM does not exceed the VCMD level during the non-overlap time (see Fig.4), the Capacitive Mode Detection (CMD) circuit assumes that the circuit is in capacitive mode of operation. Consequently the frequency will be directly increased to fmax. In this event the frequency behaviour is decoupled from the voltage at pin CSW until the voltage is discharged to zero. An internal filter of 30 ns is included at pin ACM to increase the noise immunity.
Charge coupling Due to parasitic capacitive coupling to the high voltage circuitry all pins are charged with a repetitive charge injection. Given the typical application the pins IREF and CF are sensitive to this charge injection. For charge coupling of 8 pC, a safe functional operation of the IC is guaranteed, independent of the current level. Charge coupling at current levels below 50 A will not interfere with the accuracy of the VCS and VACM levels. Charge coupling at current levels below 20 A will not interfere with the accuracy of any parameter.
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); all voltages referenced to ground. SYMBOL Vhs VACM VLVS VCS+ VCS- VCSW Tamb Tj Tstg Vesd PARAMETER high side supply voltage voltage on pin ACM voltage on pin LVS voltage on pin CS+ voltage on pin CS- voltage on pin CSW ambient temperature junction temperature storage temperature electrostatic discharge voltage pins FVDD, GH, SH and VDD pins GL, ACM, CS+, CS-, CSW, LVS, CF, IREF, CT and VREF Note 1. In accordance with the human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor. note 1 -1000 -2500 +1000 +2500 V V CONDITION Ihs < 30 A; t < 1 s Ihs < 30 A - - -5 0 0 -0.3 0 -25 -25 -55 MIN. MAX. 600 510 +5 5 5 +5 5 +80 +150 +150 V V V V V V V C C C UNIT
2002 Oct 24
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Philips Semiconductors
Product specification
600 V CCFL ballast driver IC
UBA2070
THERMAL CHARACTERISTICS SYMBOL Rth(j-a) SO16 DIP16 Rth(j-t) thermal resistance from junction to tie-point SO16 DIP16 QUALITY SPECIFICATION In accordance with "SNW-FQ-611D". CHARACTERISTICS VDD = 13 V, VFVDD - VSH = 13 V; Tamb = 25 C; all voltages referenced to ground; see Fig.8; unless otherwise specified. SYMBOL High voltage supply IL leakage current on high voltage pins voltage at pins FVDD, GH and SH = 600 V - - 30 A PARAMETER CONDITION MIN. TYP. MAX. UNIT 50 30 K/W K/W PARAMETER DESCRIPTION VALUE 100 60 UNIT K/W K/W
thermal resistance from junction to ambient in free air
Start-up state (pin VDD) VDD VDD(high) VDD(low) VDD(hys) IDD(start) VDD(clamp) IDD(pd) VDD(reset) IDD supply voltage for defined driver output oscillator start voltage oscillator stop voltage start-stop hysteresis voltage start-up current clamp voltage Power-down current reset voltage operating supply current VDD < VDD(high) Power-down mode VDD = 9 V Ths = off; Tls = off fbridge = 40 kHz without gate drive IL = 10 A source sink Zo Vref/T output impedance temperature coefficient of Vref IL = 1 mA source IL = 10 A; Tamb = 25 to 150 C Ths = off; Tls = off - 12.4 8.6 3.5 - 10 - 4.5 - - 13 9.1 3.9 170 11 170 5.5 1.5 6 13.6 9.6 4.4 200 12 200 7 2.2 V V V V A V A V mA
Reference voltage (pin VREF) Vref Iref reference voltage reference current 2.86 1 1 - - 2.95 - - 3 -0.64 3.04 - - - - V mA mA %/K
Current supply (pin IREF) VI II input voltage input current - 65 2.5 - - 95 V A
2002 Oct 24
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Philips Semiconductors
Product specification
600 V CCFL ballast driver IC
UBA2070
SYMBOL
PARAMETER
CONDITION
MIN. - 90 38.9
TYP.
MAX. - 110 42.1 - 1.13 1.25 - 3.3 3.4
UNIT s kHz kHz % s s s V V A A A V
Voltage controlled oscillator tstart fbridge(max) fbridge(min) fstab tno(min) tno(max) PIN CSW Vi Vclamp PIN CF Istart Imin Imax VOH Output drivers Vboot VFVDD IFVDD PINS GH AND GL Isource Isink VOH VOL Ron Roff Ii Vdet source current sink current HIGH-level output voltage LOW-level output voltage VGH - VSH = 0; VGL = 0 VGH - VSH = 13 V; VGL = 13 V Io = 10 mA Io = 10 mA Io = 10 mA Io = 10 mA VACM = 1.25 V positive negative 135 265 12.5 - 32 16 - 80 -68 180 300 - - 39 21 - 100 -85 235 415 - 0.5 mA mA V V A mV mV bootstrap diode forward drop lockout voltage on pin FVDD floating well supply current on pin FVDD DC level at VGH - VSH = 13 V I = 5 mA 1.3 2.8 - 1.7 3.5 35 2.1 4.2 - V V A start current minimum current maximum current HIGH-level output voltage VCF = 1.5 V VCF = 1.5 V VCF = 1.5 V f = fmin 3.8 - - - 4.5 21 54 2.5 5.2 - - - input voltage clamp voltage burn state 2.7 2.8 3 3.1 first output oscillator stroke maximum bridge frequency minimum bridge frequency frequency stability minimum non-overlap time maximum non-overlap time Tamb = -20 to +80 C GH to GL GL to GH at fbridge = 40 kHz; note 1 after start-up state only 50 100 40.5 1.3 0.90 1 6.7
- 0.68 0.75 -
HIGH SIDE AND LOW SIDE
on resistance off resistance
45 26
Adaptive non-overlap timing and capacitive mode detection (pin ACM) input current capacitive mode detection voltage 1 120 -102
2002 Oct 24
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Philips Semiconductors
Product specification
600 V CCFL ballast driver IC
UBA2070
SYMBOL
PARAMETER
CONDITION
MIN. - 1.19 112 - 1.67 -
TYP.
MAX.
UNIT A V mV mV/K V A A A mV A A A/mV A V V V s
Lamp voltage sensor (pin LVS) Ii VLVS(fail) VLVS(fail)(hys) VLVS(max) Io(sink) Io(source)(ign) Ii Voffset Io(source) Io(sink) gm Io VOL VOH Vhys tign Note 1. The maximum non-overlap time is determined by the level of the CF signal. If this signal exceeds a level of 1.25 V the non-overlap will end. This equals a maximum non-overlap time of 6.7 s at a bridge frequency of 40 kHz. input current fail voltage fail voltage hysteresis maximum voltage output sink current ignition output source current VCSW = 2 V VCSW = 2 V VCS = 0 V VCS = 0 to 2.5 V VCSW = 2.0 V VCSW = 2.0 V f = 1 kHz VLVS = 1.25 V 1 1.31 168 - 1.85 3.6 11 1.25 140 0.65 1.76 3.2 10 - 0 10 10 200
VLVS(fail)(hys)/T temperature coefficient hysteresis
2.8 9.0 - -2 9.0 9.0 100
Average current sensor (pins CS+ and CS-) input current offset voltage output source current output sink current transconductance 1 +2 11 11 400
Ignition timer (pin CT) output current LOW-level output voltage HIGH-level output voltage output hysteresis ignition time VCT = 2.5 V 5.5 - - 2.05 - 5.9 1.4 3.6 2.20 0.257 6.3 - - 2.35 -
2002 Oct 24
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ndbook, full pagewidth
Lamp1
UBA2070 +
VDC 300 V
ADAPTIVE NON-OVERLAP TIMING
RACM 1.5
ZVDD 13 V
Cres2 1 nF
CT 1
IGNITION TIMER
CAPACITIVE MODE DETECTOR
12 ACM C LVS1 8.2 nF 13 LVS C LVS3 D LVS1 R LVS 150 k C LVS2 DLVS2 8.2 nF
CVDD 1 F DIVIDER LAMP VOLTAGE SENSOR
REFERENCE CURRENT
VOLTAGE CONTROLLED OSCILLATOR 5 GND 3 CF C CF 100 pF 2
AVERAGE CURRENT SENSOR 14
- +
16 CS - 15 CS +
R avg 8.2 k
56 nF
4 IREF C CT 330 nF R IREF 33 k
CSW CCSW 220 nF
VREF R pwr1 220 k Cpwr 1 nF R pwr2 8.2 k
Cavg 12 nF
Rsense 2.2
Lamp2
2002 Oct 24
R VDD 470 k 10 GH BOOTSTRAP VDD 7 HIGH SIDE DRIVER 11 SH SUPPLY DRIVER CONTROL LOW SIDE DRIVER 6 GL
APPLICATION AND TEST INFORMATION
Philips Semiconductors
600 V CCFL ballast driver IC
DVDD
9 FVDD
C boot 100 nF
R GH 47
Ths
CDC 220 nF CBR1 1 nF Cres1 1 nF CBR2 18 nF C lamp1 47 pF C lamp2 47 pF
R GL 47
Tls
13
Product specification
MGT991
UBA2070
Fig.8 Test application circuit.
Philips Semiconductors
Product specification
600 V CCFL ballast driver IC
UBA2070
PACKAGE OUTLINES SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
D
E
A X
c y HE vMA
Z 16 9
Q A2 A1 pin 1 index Lp 1 e bp 8 wM L detail X (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 0.069 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 10.0 9.8 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.050 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 0.039 0.016 Q 0.7 0.6 0.028 0.020 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.7 0.3 0.028 0.012
0.010 0.057 0.004 0.049
0.019 0.0100 0.39 0.014 0.0075 0.38
0.244 0.041 0.228
8 0o
o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT109-1 REFERENCES IEC 076E07 JEDEC MS-012 EIAJ EUROPEAN PROJECTION
ISSUE DATE 97-05-22 99-12-27
2002 Oct 24
14
Philips Semiconductors
Product specification
600 V CCFL ballast driver IC
UBA2070
DIP16: plastic dual in-line package; 16 leads (300 mil); long body
SOT38-1
D seating plane
ME
A2
A
L
A1
c Z e b1 b 16 9 MH wM (e 1)
pin 1 index E
1
8
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.7 0.19 A1 min. 0.51 0.020 A2 max. 3.7 0.15 b 1.40 1.14 0.055 0.045 b1 0.53 0.38 0.021 0.015 c 0.32 0.23 0.013 0.009 D (1) 21.8 21.4 0.86 0.84 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.10 e1 7.62 0.30 L 3.9 3.4 0.15 0.13 ME 8.25 7.80 0.32 0.31 MH 9.5 8.3 0.37 0.33 w 0.254 0.01 Z (1) max. 2.2 0.087
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT38-1 REFERENCES IEC 050G09 JEDEC MO-001 EIAJ SC-503-16 EUROPEAN PROJECTION
ISSUE DATE 95-01-19 99-12-27
2002 Oct 24
15
Philips Semiconductors
Product specification
600 V CCFL ballast driver IC
UBA2070
SOLDERING Introduction This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. Through-hole mount packages SOLDERING BY DIPPING OR BY SOLDER WAVE The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. MANUAL SOLDERING Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. Surface mount packages REFLOW SOLDERING Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method.
Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 220 C for thick/large packages, and below 235 C for small/thin packages. WAVE SOLDERING Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. MANUAL SOLDERING Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C. 16
2002 Oct 24
Philips Semiconductors
Product specification
600 V CCFL ballast driver IC
UBA2070
Suitability of IC packages for wave, reflow and dipping soldering methods MOUNTING PACKAGE(1) suitable(3) not suitable(4) suitable not recommended(5)(6) not recommended(7) SOLDERING METHOD WAVE Through-hole mount DBS, DIP, HDIP, SDIP, SIL Surface mount HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC(5), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. For more detailed information on the BGA packages refer to the "(LF)BGA Application Note" (AN01026); order a copy from your Philips Semiconductors sales office. 2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 3. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. 4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 5. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 6. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 7. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable REFLOW(2) DIPPING - suitable suitable suitable suitable suitable suitable - - - - -
2002 Oct 24
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Philips Semiconductors
Product specification
600 V CCFL ballast driver IC
UBA2070
DATA SHEET STATUS LEVEL I DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development DEFINITION This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
II
Preliminary data Qualification
III
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2002 Oct 24
18
Philips Semiconductors
Product specification
600 V CCFL ballast driver IC
UBA2070
NOTES
2002 Oct 24
19
Philips Semiconductors - a worldwide company
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
(c) Koninklijke Philips Electronics N.V. 2002
SCA74
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613502/02/pp20
Date of release: 2002
Oct 24
Document order number:
9397 750 10257


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